65 lines
1.3 KiB
C
65 lines
1.3 KiB
C
#include <stdint.h>
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#include <arch/io.h>
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#include <tianole/arch.h>
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#define X86_QEMU_DEBUG_PORT 0xe9
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#define X86_COM1_BASE 0x3f8
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#define X86_COM_DATA 0
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#define X86_COM_INTERRUPT_ENABLE 1
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#define X86_COM_FIFO_CONTROL 2
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#define X86_COM_LINE_CONTROL 3
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#define X86_COM_MODEM_CONTROL 4
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#define X86_COM_LINE_STATUS 5
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#define X86_COM_LCR_DLAB 0x80
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#define X86_COM_LCR_8N1 0x03
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#define X86_COM_LSR_THRE 0x20
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static void debug_port_putc(char ch)
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{
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outb(X86_QEMU_DEBUG_PORT, (uint8_t)ch);
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}
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static void serial_putc(char ch)
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{
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uint32_t timeout;
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for (timeout = 0; timeout < 100000; timeout++) {
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if ((inb(X86_COM1_BASE + X86_COM_LINE_STATUS) &
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X86_COM_LSR_THRE) != 0) {
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break;
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}
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}
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outb(X86_COM1_BASE + X86_COM_DATA, (uint8_t)ch);
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}
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void arch_early_log_init(void)
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{
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outb(X86_COM1_BASE + X86_COM_INTERRUPT_ENABLE, 0x00);
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outb(X86_COM1_BASE + X86_COM_LINE_CONTROL, X86_COM_LCR_DLAB);
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outb(X86_COM1_BASE + X86_COM_DATA, 0x03);
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outb(X86_COM1_BASE + X86_COM_INTERRUPT_ENABLE, 0x00);
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outb(X86_COM1_BASE + X86_COM_LINE_CONTROL, X86_COM_LCR_8N1);
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outb(X86_COM1_BASE + X86_COM_FIFO_CONTROL, 0xc7);
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outb(X86_COM1_BASE + X86_COM_MODEM_CONTROL, 0x0b);
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}
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void arch_early_log_putc(char ch)
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{
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debug_port_putc(ch);
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serial_putc(ch);
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}
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void arch_halt_forever(void)
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{
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__asm__ volatile("cli");
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for (;;) {
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__asm__ volatile("hlt");
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}
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}
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